Enhancement Mode Metal Oxide Semiconductor Field Effect Transistors
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Enhancement Mode Metal Oxide Semiconductor Field Effect Transistors

Enhancement Mode Metal-Oxide Semiconductor Field-Effect Transistors

Field-Effect Transistors (FETs) are another main group of transistors. There are two primary types of FETs: metal-oxide semiconductor field-effect transistors (MOSFETs) and Junction Field Effect Transistors (JFETs). MOSFETs are grouped into enhancement-mode MOSFETs and depletion-mode MOSFETs. Each of these transistors can be either an n-channel device or a p-channel device depending on the nature of the doping. Figure 123.1 illustrates both the n-channel enhancement MOSFET and the p-channel enhancement MOSFETs.

(a) Explain the conduction state of the NMOS (figure 123.1c).
(b) Define the following terms: Threshold Voltage, Conductance Parameter, Early Voltage.
(c) Name and characterize the three operating regions of the NMOS transistor.

The strings: S7P5A51 (Physical Change).

The math:
Pj Problem of Interest is of type change (physical change). Transistors are primarily used for signal amplification and switching. Both are change problems.

Enhancement Mode Metal Oxide Semiconductor Field Effect Transistors

(a)The NMOS has three terminals: gate (similar to the BJT base), drain (similar to the collector), and the source (similar to the emitter).
It has a p-material substrate (or bulk) electrically connected to the source. So the substrate does not appear as a separate terminal in circuit diagram.
The gate consists of a metal film separated from the p-substrate by a thin oxide layer (hence called metal oxide semiconductor).
both drain and source are made of n+ material.

Consider figure 123.1c. Without the voltage supply connected to the gate, no current will flow in the NMOS since all junctions are reverse-biased. This is the normal off state of the NMOS.
When a positive voltage is applied to the gate, electric field is created (hence called field-effect). The field repels positive charges away from the surface of the p-substrate. Consequently a narrow channel (green in diagram) consisting of negative charges that are available for conduction, is formed near the surface of the p-substrate.
The higher the gate voltage (enhancement), the higher the concentration of the negative charges, so the higher the conductivity.

(b) Threshold Voltage (VT): the positive voltage that must be exceeded by the gate voltage in order to form a conducting channel in the NMOS. In other words, NMOS is on if gate voltage > VT. It is off otherwise.
Conductance Parameter (K) : ability of the channel to conduct. Expressed as a formula as follows:
K = (WμCox)/2L.
W = width of channel; L = length of channel; μ = mobility of charge carrier (electrons in nmos, holes in pmos); Cox = capacitance of oxide layer.
Early Voltage (VA): describes the dependence of MOSFET drain current to drain-source voltage (vDS). Usually assumed to approach infinity to indicate the drain current is independent of vDS.

(c) Cuttoff Region: gate-source voltage, vGS < VT and gate-drain voltage, vGD <VT
No conduction channel. So, drain current iD = 0.

Saturation Region: gate-source voltage, vGS > VT, and gate-drain voltage, vGD <VT.
Channel is on at the source and off at the drain.
drain current iD almost independent of drain-source voltage (vDS) and depends on only the gate voltage.
iD = K(vGS - VT)2(1 + vDS/VA)
iD = K(vGS - VT)2. If VA is assumed to be very large.
MOSFET behaves like a voltage-controlled current source.

Triode or Ohmic Region: gate-source voltage, vGS > VT, and gate-drain voltage, vGD >VT.
Chanel is on at the source and at the drain.
drain current iD is strongly dependent on both drain-source voltage (vDS) and gate-source voltage, vGS
drain current iD = K[2(vGS - VT)vDS - v2DS]
MOSFET behaves like a voltage-controlled resistor (gate voltage is the controlling volatage).
Voltage-controlled resistor widely used in integrated circuits.


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