Enhancement-Mode MOSFETS As Switches - The NAND Gate

**Strings (S _{i}P_{j}A_{jk}) = S_{7}P_{5}A_{51} Base Sequence = 12735 String Sequence = 12735 - 5 - 51**

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Enhancement-Mode MOSFETS As Switches - The NAND Gate

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Enhancement-mode MOSFETS are primary components in *amplification* and *switching* circuits. They are combined in various ways as *gates* to realize complex *switching* configurations.

Figure 123.6(a) is an arrangement of two *pMOS* connected in parallel and two *nMOS* connected in series to form a *NAND gate*. Figure 123.6(b) is the symbol and Figure 123.6(c) is the *truth table* for the configuration.

Show how the circuit of figure 123.6(a) functions as a NAND gate.

**The strings**:
S_{7}P_{5}A_{51} (Physical Change).
**The math**:

Pj Problem of Interest is of type *change* (physical change). Transistors are primarily used for signal *amplification* and *switching*. Both are *change* problems.

Consider figure 123.6(a). When A = 0 and B = 0, there is a conduction path from each pMOS to the output. So the output=1. The output=1 whenever there is a conduction path from any of the pMOS to the output. The output=0 when there is no conduction path from any of the pMOS. This scenario occurs when A=1 and B=1 as shown in the truth table (figure 123.6c).

NAND-gates can be used to build any kind of gate. For example, an an INVERTER is just a NAND-gate with only one input; an AND-gate is a NAND with an INVERTER at its output; and an OR-gate is a NAND-gate with an INVERTER on each input. Consequently, some circuit technology uses the NAND-gate as the most primitive building block, from which everything else is built.

The *point* **.** is a mathematical abstraction. It has negligible size and a great sense of position. Consequently, it is front and center in abstract existential reasoning.

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